发明名称 FLASH MEMORY AND DATA ERASING METHOD OF THE SAME
摘要 When data erasure of a flash memory is interrupted and restarted from the interrupted point, time required for the data erasure is shortened. A flash memory includes a memory cell(s), a verification circuit, and a power supply circuit. The verification circuit measures a threshold voltage of the memory cell(s) by verifying an erasure state of the memory cell(s). The power supply circuit applies, to the memory cell(s), one or more pulse voltages whose initial pulse voltage has a strength that corresponds to the measured threshold voltage.
申请公布号 US2010259994(A1) 申请公布日期 2010.10.14
申请号 US20100751260 申请日期 2010.03.31
申请人 NEC ELECTRONICS CORPORATION 发明人 TERAUCHI YOUJI
分类号 G11C16/06;G11C16/16 主分类号 G11C16/06
代理机构 代理人
主权项
地址