发明名称 |
MAPPING MECHANISM, FOUP, AND LOAD PORT |
摘要 |
PROBLEM TO BE SOLVED: To provide a mapping mechanism capable of properly performing mapping processing to wafers in FOUPs without opening lid sections of the FOUPs, and capable of simplifying a structure and suppressing an unneeded increase in cost. SOLUTION: The FOUP 1 includes a wafer placement section capable of placing the wafer W in a plurality of stages in a height direction, and the openable/closable lid section 12. The mapping mechanism M for performing mapping for the FOUP comprises a light projection section 241 and a light reception section 242 provided in a load port, and window sections 12B, 12C provided on an optical path L capable of crossing at least one portion of the wafer W placed at each stage section of the wafer placement section in the FOUP 1 between the light projection section 241 and the light reception section 242 for transmitting light. COPYRIGHT: (C)2011,JPO&INPIT
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申请公布号 |
JP2010232560(A) |
申请公布日期 |
2010.10.14 |
申请号 |
JP20090080614 |
申请日期 |
2009.03.27 |
申请人 |
SINFONIA TECHNOLOGY CO LTD |
发明人 |
SUZUKI KENSUKE;KAMIGAKI TOSHIO;MIENO YASUMICHI |
分类号 |
H01L21/67;H01L21/673;H01L21/677 |
主分类号 |
H01L21/67 |
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