发明名称 PLL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To avoid unstable state and deterioration, in the phase noise characteristics of a PLL circuit. <P>SOLUTION: The PLL circuit in which an oscillation frequency is controlled, according to the phase difference between a feedback signal outputted from a voltage-controlled oscillator and a reference signal inputted from the external includes a frequency divider for dividing the frequency of the feedback signal; a multiplexer for multiplexing the reference signal; a mixer for mixing an output signal from the frequency divider and an output signal from the multiplexer and converting the frequency; a first digital frequency divider for dividing the frequency of the output signal from the mixer and outputting a digital frequency-divided signal; a second digital frequency divider for dividing the frequency of the reference signal and outputting a digital frequency-divided signal; and a phase comparator for comparing the digital phase of the digital frequency-divided signal, outputted from the first digital frequency divider with that of the digital frequency-divided signal outputted from the second digital frequency divider. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010233078(A) 申请公布日期 2010.10.14
申请号 JP20090080002 申请日期 2009.03.27
申请人 FURUKAWA ELECTRIC CO LTD:THE;FURUKAWA AUTOMOTIVE SYSTEMS INC 发明人 KUROSAWA HAJIME;WAKAHISHI TADATAKA
分类号 H03L7/16 主分类号 H03L7/16
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