| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a pulse radar device for reducing a necessary memory capacity, and shortening greatly a time required for a one-time detection cycle. <P>SOLUTION: An auxiliary operation processing part 120 includes four switches 131-134 in order to perform reading and writing alternately by using two memories, a first memory and a second memory. The output side of a pre-sum processing part 123 is connected to a contact point a of a first switch 131, and the input side of a determination part 111 is connected to a contact point a of a second switch. Further, the input side and the output side of a complex FET processing part 124 are connected respectively to each contact point a of a third switch 131 and a fourth switch. In addition, the first memory 125 is connected to each contact point b of the switches 131-134, and the second memory 126 is connected to a contact point c. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
