发明名称 Apparatus and method for performing a cryptographic algorithm
摘要 <p>An apparatus for performing a cryptographic algorithm which can be AES algorithm according to Rijndael includes a CPU (12) and a coprocessor (14). One step of the cryptographic algorithm is a mix columns transformation on mix columns input data. The CPU (12) is arranged for providing the mix columns input data. The coprocessor (14) is arranged for performing at least a part of the mix columns transformation on the mix columns transformation with an arithmetic unit which conducts calculations for a number of data units in parallel, said number being equal to or greater than the number of data units of a column. By performing the mix columns transformation using CPU and a coprocessor having a long integer arithmetic unit, the execution time and the required memory space RAM can be reduced. Additionally, security is enhanced, since timing or power analysis related attacks are harder to perform.</p>
申请公布号 EP1419436(B1) 申请公布日期 2010.10.13
申请号 EP20010976117 申请日期 2001.08.20
申请人 INFINEON TECHNOLOGIES AG 发明人 VALVERDE, ANTONIO;SEIFERT, JEAN-PIERRE
分类号 G06F9/38;G06F9/305;G06F9/315;H04L9/06 主分类号 G06F9/38
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