Memory systems for computing devices and systems

摘要

Memory systems and devices are provided. One memory system (300) includes a controller (310) configured to be coupled to a plurality of computing devices (410), a plurality of Multi-Level Cell (MLC) devices coupled to the controller (310), and a Single-Level Cell (SLC) device coupled to the controller (310) and the plurality of MLC devices. The MLC devices are configured to split the storage of data across the plurality of MLC devices and the SLC device is configured to function as a parity device for the data. A memory device (100) includes a controller (310), a plurality of MLC FLASH devices, and a SLC FLASH device. The MLC FLASH devices are configured to split the storage of data across the plurality of MLC FLASH devices and the SLC FLASH device is configured to function as a parity device for the data. Also provided are computing devices (410) including the above memory device (100).