发明名称 Programmable logic systems and methods employing configurable floating point units
摘要 A programmable system is disclosed having multiple configurable floating point units (“FPU”) that are coupled to multiple programmable logic and routing blocks and multiple memories. Each floating point unit has static configuration blocks and dynamic configuration blocks, where the dynamic configuration blocks can be reconfigured to perform a different floating point unit function. A floating point unit includes a pre-normalization for shifting an exponent calculation as well as shifting and aligning a mantissa, and a post-normalization for normalizing and rounding a received input. The post-normalization receives an input Z and realigns the input, normalizes the input and rounds the input Z.
申请公布号 US7814136(B1) 申请公布日期 2010.10.12
申请号 US20060344694 申请日期 2006.02.01
申请人 AGATE LOGIC, INC. 发明人 VERMA HARE K.;SUNKAVALLI RAVI;GUNWANI MANOJ
分类号 G06F7/38 主分类号 G06F7/38
代理机构 代理人
主权项
地址