发明名称 HIERARCHICAL MEMORY ARCHITECTURE TO CONNECT MASS STORAGE DEVICES
摘要 PURPOSE: A hierarchical memory architecture for connecting a storage device including a collecting device within a memory storage system is provided to improve memory storage effect through hierarchical data storage in a hierarchical memory architecture. CONSTITUTION: A concentrator(30) includes a front side bus port to a backside port and a processor front side bus. A data stored in external memory devices is received to the backside port. The data is stored in a PCM(Pulse Code Modulation) array. The data is transmitted through the front side bus port to a processor(20). The external memory device is arranged after the concentrator.
申请公布号 KR20100109528(A) 申请公布日期 2010.10.08
申请号 KR20100029307 申请日期 2010.03.31
申请人 EILERT SEAN 发明人 EILERT SEAN
分类号 G06F13/38;G06F11/10;G06F13/36;G06F13/40 主分类号 G06F13/38
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