CONNECTION QUALITY VERIFICATION FOR INTEGRATED CIRCUIT TEST
摘要
An integrated circuit device 100 comprising a semiconductor die contained in a package. The integrated circuit device includes one or more internal connection verification modules 304 for asserting a poor connection signal for the test apparatus in response to a voltage difference between a voltage at a corresponding internal power supply node 120 and a reference voltage, the voltage difference being indicative of a poor connection of power supply to one of power supply terminals 104 on the package. The test apparatus 300, 400 can include an indicator 312 or a sorting element 316 for rejecting or accepting the integrated circuit device 100 in response to logic signals indicative of the presence or absence of a defect accompanied by non-assertion of the poor connection signal, and for processing the integrated circuit device 100 distinctively in response to assertion of the poor connection signal.
申请公布号
WO2010112976(A2)
申请公布日期
2010.10.07
申请号
WO2009IB51356
申请日期
2009.03.31
申请人
FREESCALE SEMICONDUCTOR, INC.;FEFER, YEFIM - HAIM;SOFER, SERGEY;ZAPESOCHINI, BORIS
发明人
FEFER, YEFIM - HAIM;SOFER, SERGEY;ZAPESOCHINI, BORIS