发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR VERIFYING FUNCTION OF MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which allows a failure bit to be easily inserted to the memory, and a method for verifying a function of a memory. SOLUTION: A BIST circuit 1 includes a BIST control circuit 11, a data creation circuit 12, a timing register 13, a bits inversion circuit 14, an address creation circuit 15, a control signal creation circuit 16, and a result analysis circuit 17. The bits inversion circuit 14 is provided in the BIST circuit 1, and a part of bits in write-in data is inverted based on a failure insertion indicating signal. Therefore, a virtual failure bit can be inserted to the memory 2 accordingly even when practically no failure bit exists in the memory 2. Thus, the function verification for quality judge or relief analysis can be easily carried out. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010225239(A) 申请公布日期 2010.10.07
申请号 JP20090071871 申请日期 2009.03.24
申请人 TOSHIBA CORP 发明人 YASUKURA KENICHI;TOKUNAGA CHIKAKO
分类号 G11C29/12;G01R31/28;G11C29/04;H01L21/822;H01L27/04 主分类号 G11C29/12
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