发明名称 PROCESSOR OF DATA CONVERSION FUNCTION
摘要 <p>In a MISTY1 FI function, an exclusive OR 102 to which a round key KIij2 is inputted is arranged between an exclusive OR 101 arranged on a 9-bit critical path 100a in a first MISTY structure and a zero-extend conversion 120U connected to the branching point 301 of a 7-bit right system data path 110a. Then, a 9-bit round key KIij1 is truncate-converted to seven bits, the exclusive OR of the seven bits and the round key KIij1 is calculated by an exclusive OR 113 and the calculation result is inputted to an exclusive OR 112 arranged on the right system data path 110a in the second stage MISTY structure.</p>
申请公布号 EP2237245(A1) 申请公布日期 2010.10.06
申请号 EP20080702792 申请日期 2008.01.18
申请人 FUJITSU LIMITED 发明人 YAMAMOTO, DAI;YAJIMA, JUN;ITOH, KOUICHI
分类号 H04L9/06 主分类号 H04L9/06
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