PURPOSE: An analog divider is provided to control the resistance of small input signal by including a linear control block combined with a new DC offset which is formed with a resistor and an inverter. CONSTITUTION: A linear control block(11) removes a first DC offset included in an input signal through a DC blocking capacitor. The linear control block combines a second offset with the input signal from which the first DC offset is removed. A divider core divides the period of a signal which is passed through the linear control block. An output buffer amplifies the output signal of the divider core.
申请公布号
KR20100105989(A)
申请公布日期
2010.10.01
申请号
KR20090024387
申请日期
2009.03.23
申请人
SAMSUNG ELECTRO-MECHANICS CO., LTD.
发明人
HWANG, SANG HOON;PARK, TAH JOON;CHO, KOON SHIK;LIM, JOON HYUNG