发明名称 METHOD FOR PERFORMING PASS/FAIL DETERMINATION OF CIRCUIT BOARD
摘要 PROBLEM TO BE SOLVED: To determine even electric qualities of circuit wiring, along with determination of a mounted state of a component in an inspection of component-mounted circuit board. SOLUTION: The component-mounted circuit board has a plurality of electrically independent circuit wiring 11, 12, and 13 on its outer layer, and has an inner-layer pattern 14 on aother layer, and the component element D is mounted on the circuit wiring conductors. On the occasion of determining the mounted state of the component element D and determining electric qualities of circuit wiring on the circuit board, the impedance Z12 of the component element D is measured with probes P1, P2, and P3 made to be a high potential, a low potential, and a guard potential respectively; the impedance Z13 between the probes P1 and P3 is measured with the probe P3 made to be the same low potential as the probe P2; and the impedance Z23 between the probes P1 and P3 is measured with the probe P3 made to be the same high potential as the probe P1, while the probes P1 and P2 are in contact with one electrode terminal and the other of the component element D, and the prove P3 is in contact with the inner-layer pattern 14. After that, each of the impedances Z12, Z13, and Z23 is compared with a reference Z12ref, Z13ref, or Z23ref obtained previously from a conforming circuit board through measurement. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010216827(A) 申请公布日期 2010.09.30
申请号 JP20090060707 申请日期 2009.03.13
申请人 HIOKI EE CORP 发明人 SATO YOSHINORI
分类号 G01R31/02;H05K3/00 主分类号 G01R31/02
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