发明名称 WAFER PROCESSING TAPE
摘要 PROBLEM TO BE SOLVED: To provide a wafer processing tape that suppresses a chip leap in a dicing step and occurrence of an error such that an adjacent chip is lifted together in a picking-up step. SOLUTION: The wafer processing tape 10 has a pressure-sensitive adhesive film 12 comprising a base film 12a and a pressure-sensitive adhesive layer 12b, and an adhesive layer 13 laminated on the pressure-sensitive adhesive film 12. The pressure-sensitive adhesive layer 12b has an elastic coefficient of 0.05 to 0.6 MPa at 80°C, and the adhesive layer 13 has an elastic coefficient of 0.1 to 1 MPa at 80°C. Fusion of the adhesive layer 13 and the pressure-sensitive adhesive film 12 in dicing is suppressed to suppress formation of cutting remainders of the adhesive layer, pressure-sensitive adhesive layer, etc. During the dicing, a decrease in adhesive power of the pressure-sensitive adhesive layer is suppressed to suppress peeling on an interface between the pressure-sensitive adhesive layer and the adhesive layer, and a decrease in adhesive power of the adhesive layer is suppressed to suppress peeling on an interface between a semiconductor chip with the adhesive layer in the form of an individual piece and the adhesive layer. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010219432(A) 申请公布日期 2010.09.30
申请号 JP20090066776 申请日期 2009.03.18
申请人 FURUKAWA ELECTRIC CO LTD:THE 发明人 YAMAKAWA TAKANORI;MORISHIMA YASUMASA;ISHIWATARI SHINICHI
分类号 H01L21/301;C09J7/02;C09J133/04;H01L21/52;H01L21/683 主分类号 H01L21/301
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