| 摘要 |
PROBLEM TO BE SOLVED: To execute the evaluation test of a polarization property and the fatigue test in a ferroelectric capacitor and also to reduce the chip size. SOLUTION: The semiconductor memory device includes ferroelectric capacitors, cell transistors, bit lines to which a plurality of memory cells are connected, word lines connected to a gate of the cell transistor, plate lines connected to one side of electrodes of ferroelectric capacitors, sense amplifiers connected to the bit lines, a test pad which can apply voltage to the bit lines from the outside, test transistors provided corresponding to the bit lines and existing between the test pad and each bit line, and a fatigue test bias circuit connected to the first node between the test pad and the test transistor; the test transistor is shared to the first test for applying voltage to the ferroelectric capacitor from the test pad and the second test for applying voltage to the ferroelectric capacitor from the fatigue test bias circuit. COPYRIGHT: (C)2010,JPO&INPIT
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