SEMICONDUCTOR VARACTOR WITH REDUCED PARASITIC RESISTANCE

摘要

A semiconductor varactor with reduced parasitic resistance is disclosed. A contact isolation structure (32) is formed in a well region (20). The gate contact structures (70) are formed above the contact isolation structure (32) reducing the parasitic resistance. In addition, contact structures are formed on the gate layer (50) over the well regions (20) in a further embodiment to reduce the parasitic resistance.