RECTIFIER CIRCUIT WITH REDUCED POWER DISSIPATION

摘要

A rectifier circuit for use in a power supply to convert ac input power to dc output power to supply a dc load provides for reduced rectifier circuit power dissipation. The power supply includes a first ac source input line, a second ac source input line, a DC power supply line, and a DC power return line. The rectifier circuit includes a first field effect transistor (FET) having its drain coupled to the first ac source input line and its source coupled to the DC power return line, and a second FET having its drain coupled to the second ac source input line and its source coupled to the DC power return line. During an ac cycle, the first FET closes during the positive half cycle and the second FET closes during the negative half cycle.