发明名称 SEMICONDUCTOR DEVICE AND ARRANGEMENT METHOD FOR COMPENSATION CAPACITOR OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device or the like that secures a sufficient compensation capacitance by effectively utilizing a region in a circuit cell so as to surely suppress variations in power supply voltage. SOLUTION: The semiconductor device comprises a circuit cell 2 including a plurality of elements arranged side by side in a first direction, and a basic end cell 1 (1a). The basic end cell has compensation capacitors C1, C2 adjacently arranged in the first direction of the circuit cell 2 so as to be connectable to a power supply of the circuit cell 2. Diffusion layers 10, 11 constituting the compensation capacitors C1, C2 are extendingly formed along the first direction in a predetermined region (an inter-element connection region R1) of the circuit cell 2. Gate wirings 16, 17 are also extendingly formed above the diffusion layers 10, 11. By such a configuration, it is possible to surely suppress variations in power supply voltage by increasing each capacitance value of the compensation capacitors C1, C2 while effectively utilizing the inter-element connection region R1 of the circuit cell 2. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010219256(A) 申请公布日期 2010.09.30
申请号 JP20090063657 申请日期 2009.03.16
申请人 ELPIDA MEMORY INC 发明人 SHIMIZU YOSHIAKI
分类号 H01L21/82;H01L21/822;H01L27/04 主分类号 H01L21/82
代理机构 代理人
主权项
地址