| 摘要 |
A method for testing a working memory which includes a matrix of memory cells, an address bus/address coder and a write circuit/read circuit, consists of two method parts with which in one step, at least a part of the address bus/address coder is tested with regard to address faults and in another step at least a part of the memory cells are tested with regard to cell faults. The testing steps are temporally independent of one another and may thus be effected also during the operation.
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