发明名称 Test device and test method
摘要 <p>A testing apparatus according to the present invention includes: a clock generating circuit for generating a reproduced clock of which frequency and phase are substantially the same as frequency of the reference clock and phase of output data of a device under test, respectively; a delay circuit for generating a strobe for delaying the reproduced clock; a timing comparator for obtaining an output value of the output data based on the strobe; a logic comparing unit for comparing the output value with a predetermined expectation value; and a pass/fail determining module for determining pass/ fail of the device under test based on the comparison result of the logic comparing unit, and the clock generating circuit includes: a first phase comparing unit for comparing phase of the output data of the device under test with that of the reproduced clock and outputting a first comparison result signal; a second phase comparing unit for comparing phase of the reference clock with that of the reproduced clock and outputting a second comparison result signal; and a reproduced clock generating module for generating the reproduced clock based on the first and second comparison result signals.</p>
申请公布号 EP2233936(A1) 申请公布日期 2010.09.29
申请号 EP20100075008 申请日期 2005.03.11
申请人 ADVANTEST CORPORATION 发明人 KANTAKE, SHUSUKE
分类号 G01R31/319;G11C29/56;G01R31/28;G01R31/317;G01R31/3193;G11C29/00 主分类号 G01R31/319
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