发明名称 Methods for generating and implementing quasi-cyclic irregular low-density parity check codes
摘要 A device includes a supernode generator module, a supernode splitting module, and a control module. The supernode generator module generates S supernodes each comprising d symbol nodes, where S and d are integers greater than 1. The supernode splitting module splits each of the S supernodes into d derived symbols, wherein a total number of symbol edges of the d derived symbols is equal to a predetermined number of symbol edges of each of the S supernodes. The control module generates a quasi-cyclic irregular low density parity check (LDPC) code based on S*d derived symbols, wherein S equals the S supernodes and d equals the d derived symbols.
申请公布号 US7805652(B1) 申请公布日期 2010.09.28
申请号 US20060507161 申请日期 2006.08.21
申请人 MARVELL INTERNATIONAL LTD. 发明人 VARNICA NEDELJKO
分类号 H03M13/00 主分类号 H03M13/00
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