Bottom electrode mask design for ultra-thin interlayer dielectric approach in MRAM device fabrication

摘要

A bottom electrode (BE) layout is disclosed that has four distinct sections repeated in a plurality of device blocks and is used to pattern a BE layer in a MRAM. A device section includes BE shapes and dummy BE shapes with essentially the same shape and size and covering a substantial portion of substrate. There is a via in a plurality of dummy BE shapes where each via will be aligned over a WL pad. A second bonding pad section comprises an opaque region having a plurality of vias. The remaining two sections relate to open field regions in the MRAM. The third section has a plurality of dummy BE shapes with a first area size. The fourth section has a plurality of dummy BE shapes with a second area size greater than the first area size to provide more complete BE coverage of an underlying etch stop ILD layer.