| 摘要 |
<p>The real number counter subtracts the positive integer C if the count value RC is equal to or larger than 0, or adds (the positive integer B-C) and outputs a Carry if the count value RC is negative. The first integer counter for generating the first clock f1 calculates (the count value ICl + the Carry + the positive integer A). The second integer counter 150 for generating the second clock f2 (f2=f1*G) calculates (the count value IC2 + the Carry + the positive integer A + the offset value) at each input clock. The correction circuit outputs the offset value so that the second integer counter counts "the maximum count value*(f2/f1-1)*D" times more than the first integer counter with respect to each cycle D having a synchronization cycle length of the first clock f1 and the second clock f2.</p> |
