| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device that achieves a high-speed access operation. Ž<P>SOLUTION: In the semiconductor memory device composed of a memory cell array including a plurality of regular memory cells and a plurality of sense amplifier circuits, the memory cell array has regular memory cells MC to be used for write and read operation of desired data and a smoothing capacitor (specifically, dummy cells DMC to be used for smoothing capacitor) for reducing power source noise. A word line of the dummy cell DMC is activated at the same timing as that of a word line of the regular memory cell MC. A pre-charge level of a data line is VDD, a part of the dummy cells DMC may be used as a memory cell for generating a reference level. In this case, word lines of the regular memory cell MC is inactivated prior to the word lines of the dummy cell DMC. Further, a circuit for short-circuiting adjacent data lines may be added. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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