| 摘要 |
PROBLEM TO BE SOLVED: To provide a network processor that further increases DMA data transfer efficiency by suppressing band occupancy of a memory bus due to the DMA transfer of a reception status. SOLUTION: The network processor equipped with a storage region for storing reception data, and connected to an external memory for storing a descriptor for specifying the position of the storage region is provided with: a descriptor storage circuit for storing a plurality of descriptors; a DMA control circuit for DMA-transferring the descriptors from the external memory to the descriptor storage circuit, receiving the reception data, DMA-transferring the reception data to the storage region of the external memory based on each of the descriptors, and generating the reception status every time the reception data is DMA-transferred; a reception status storage circuit; and a reception status connection control circuit for connecting the reception statuses stored in the reception status storage circuit. The DMA control circuit transfers the connected reception statuses to the external memory. COPYRIGHT: (C)2010,JPO&INPIT |
