发明名称 Method and Apparatus For Preventing Congestive Placement
摘要 A congestive placement preventing apparatus, applied in a logic circuit layout having 2K logic circuits, where K is a positive integer, is provided. The congestive placement preventing apparatus includes a restructuring module and a synthesizing module. The restructuring module adds a selecting unit in the logic circuit layout, and adds (N−K) buffers in each of the 2K logic circuits, where N is a positive integer. The synthesizing module synthesizes the restructured logic circuit layout according to a plurality of “don't touch” synthesizing commands associated with the added buffers. In the synthesized logic circuit layout, all of the 2K logic circuits are independent and not coupled or merged with one another.
申请公布号 US2010242009(A1) 申请公布日期 2010.09.23
申请号 US20090501823 申请日期 2009.07.13
申请人 MSTAR SEMICONDUCTOR, INC. 发明人 LO CHEN-HSING;LU CHIEN-PANG
分类号 G06F17/50 主分类号 G06F17/50
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