发明名称 METHODS AND SYSTEMS FOR PACKAGING INTEGRATED CIRCUITS
摘要 Panel level methods and systems for packaging integrated circuits are described. In a method aspect of the invention, a substrate formed from a sacrificial semiconductor wafer is provided having a plurality of metallized device areas patterned thereon. Each device area includes an array of metallized contacts. Dice are mounted onto each device area and electrically connected to the array of contacts. The surface of the substrate including the dice, contacts and electrical connections is then encapsulated. The semiconductor wafer is then sacrificed leaving portions of the contacts exposed allowing the contacts to be used as external contacts in an IC package. In various embodiments, other structures, including saw street structures, may be incorporated into the device areas as desired. By way of example, structures having thicknesses in the range of 10 to 20 microns are readily attainable.
申请公布号 US2010237487(A1) 申请公布日期 2010.09.23
申请号 US20100789348 申请日期 2010.05.27
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 HOW YOU CHYE;YEONG SHEE MIN
分类号 H01L23/48 主分类号 H01L23/48
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