| 摘要 |
A semiconductor storage device is configured to reduce data read time. In the semiconductor storage device, an input/output control circuit is formed along one side of a memory cell array disposed between a data input pad and a data output pad. The input/output control circuit is disposed between a hold command input pad and a clock input pad. Accordingly, it is possible to minimize the distances of the wirings from the input/output control circuit to the pads and to make the distances of the wirings equal and thus to minimize the read time of the memory cell array. In addition, since it is also possible to make equal wiring distances from the input/output control circuit to the address decoder and output multiplexer, it is possible to minimize the read time of the memory cell array.
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