发明名称
摘要 <P>PROBLEM TO BE SOLVED: To restrain variations of storage states of variable resistant elements and enable high-performance memory operations, in a nonvolatile semiconductor storage device equipped with a memory cell array in which a plurality of memory cells having variable resistance elements which store information by the change of electric resistance caused by electric stress are arrayed in a line direction and in a row direction, respectively. <P>SOLUTION: A variable resistance element has resistance variation characteristics that the absolute value of a variation rate per time of a resistance value has a maximum value to the increase of an integrated impressing period and is below a prescribed value after passing the maximum value in an area in which a resistance value monotonously changes to the increase of the integrated impression period of electric stress. An information writing operation to a selected memory cell is conducted at the area as a writing state that the resistance value of the variable resistance element is within a first area R1, which is included in a resistance value range in which the absolute value of a variation rate of a resistance value is below a prescribe value after passing the maximum value. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP4546842(B2) 申请公布日期 2010.09.22
申请号 JP20050013209 申请日期 2005.01.20
申请人 发明人
分类号 G11C13/00;H01L27/10 主分类号 G11C13/00
代理机构 代理人
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