| 摘要 |
<p>Provided is a differential amplifier (100) wherein input terminals (Vinp, Vinn) to which differential input is to be given are connected to gates of input transistors (2, 3), respectively. One end of each of capacitor devices (101, 102) is connected to a source of each of the input transistors (2, 3). A switch section (20) switches connection between each of the other ends of the capacitor devices (101, 102) and each of the input terminals (Vinp, Vinn) by phase, corresponding to a control clock.</p> |
