| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To increase the resolution of the relative delay time of the output of an integration circuit and an oscillation circuit. <P>SOLUTION: The signal generator (1) includes: the plurality of integration circuits (111, 112) for inputting a plurality of analog signals and respectively outputting integration signals in which the analog signals are integrated respectively; a plurality of comparator circuits (121, 122) for respectively inputting the plurality of integration signals, comparing the size of the integration signals with a prescribed threshold and outputting comparison signals respectively; at least one delay circuit (131, 132) for inputting the respective comparison signals and outputting delay signals in which all or a part of the input signals are delayed by the set time; and a signal processing circuit (14) for inputting the respective delay signals and the comparison signals which are not delayed depending on the delay circuit, comparing the input timing of the input signals and outputting signals corresponding to the input timing. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
