| 摘要 |
<P>PROBLEM TO BE SOLVED: To suppress reflection due to an impedance mismatch between a pad of an IC chip and a transmission line connected thereto. <P>SOLUTION: As relay substrates 30A, 30B provided between the IC chip 10 and a connector, line conductors 32a, 32b of a coplanar line are formed on a substrate made of indium and phosphorus, or gallium and arsenic by ultra-fine processing technology of a semiconductor manufacturing process such that one-end sides close to the IC chip are substantially equal in width and interval to pads 11a, 11b of the IC chip 10 and other-end sides extending away from the IC chip 10 are wider in interval than the one-end sides. A variable capacity circuit 35 for suppressing an increase in impedance caused by bonding wires 45 connecting the one-end sides and the pads 11a, 11b of the IC chip 10 to each other is formed between the one-end sides of the line conductors 32a, 32b, and a ground. <P>COPYRIGHT: (C)2010,JPO&INPIT |
