发明名称 METHOD FOR FABRICATING SEMICONDUCTOR COMPONENTS USING MASKLESS BACK SIDE ALIGNMENT TO CONDUCTIVE VIAS
摘要 A method for fabricating semiconductor components (90) includes the steps of: providing a semiconductor substrate (52) having a circuit side (54), a back side (56) and conductive vias (58); removing portions of the substrate (52) from the back side (56) to expose terminal portions (76) of the conductive vias (58); depositing a polymer layer (78) on the back side (56) encapsulating the terminal portions (76); and then planarizing the polymer layer (78) and ends of the terminal portions (76) to form self aligned conductors embedded in the polymer layer (78). Additional back side elements, such as terminal contacts (86) and back side redistribution conductors (88), can also be formed in electrical contact with the conductive vias (58). A semiconductor component (90) includes the semiconductor substrate (52), the conductive vias (58), and the back side conductors embedded in the polymer layer (78). A stacked semiconductor component (96) includes a plurality of components (90-1, 90-2, 90-3) having aligned conductive vias (58) in electrical communication with one another.
申请公布号 WO2010104637(A1) 申请公布日期 2010.09.16
申请号 WO2010US23760 申请日期 2010.02.10
申请人 MICRON TECHNOLOGY, INC.;LI, JIN;JIANG, TONGBI 发明人 LI, JIN;JIANG, TONGBI
分类号 H01L21/60;H01L21/02;H01L21/68;H01L29/40 主分类号 H01L21/60
代理机构 代理人
主权项
地址