发明名称 METHOD OF MANUFACTURING WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To provide a wiring board having high electric connection reliability between a lower-layer wiring conductive layer and an upper-layer wiring conductive layer via a via hole. SOLUTION: A method of manufacturing a wiring board includes processes for stacking an upper-layer insulating layer 3 on a lower-layer insulating layer 1 where a lower-layer wiring conductor 2 is formed, forming a via hole 4 on the upper-layer insulating layer 3, performing desmear treatment of the surface of the upper-layer insulating layer 3 including the inside of the via hole 4, performing soft etching to the surface of the lower-layer wiring conductor 2 exposed to a bottom surface of the via hole 4 so that a gap V is formed between the lower-layer wiring conductor 2 and a lower surface of the upper-layer insulating layer 3 on an upper layer around the via hole 4, performing cleaner conditioner treatment to the surface of the upper-layer insulating layer 3 and the inside of the via hole 4, adsorbing a catalyst for electroless plating onto the surface of the upper-layer insulating layer 3, depositing an electroless plating layer 5 on the surface of the upper-layer insulating layer 3, and depositing an electroless plating layer 7 onto the surface of the electroless plating layer 5. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010205801(A) 申请公布日期 2010.09.16
申请号 JP20090047329 申请日期 2009.02.27
申请人 KYOCER SLC TECHNOLOGIES CORP 发明人 YAMAZAKI HIDEMI
分类号 H05K3/46 主分类号 H05K3/46
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