发明名称 Error detection in precharged logic
摘要 An integrated circuit 2 is provided with domino logic including a speculative node 22 and a checker node 24. Precharged circuitry 36 precharges both the speculative node and the checker node. Logic circuitry 26 provides a discharge path for the speculative node and the checker node in dependence upon input signal values. Evaluation control circuitry 28, 30 first couples the speculative node to the logic circuitry and then subsequently couples the checker node to the logic circuitry such that these can be discharged if the input signals to the logic circuitry 26 have appropriate values. Error detection circuitry 32 detects an error when the speculative node and the checker node are not one of both discharged or both undischarged.
申请公布号 US2010235697(A1) 申请公布日期 2010.09.16
申请号 US20090382427 申请日期 2009.03.16
申请人 ARM LIMITED;THE REGENTS OF THE UNIVERSITY OF MICHIGAN 发明人 BULL DAVID MICHAEL;DAS SHIDHARTHA;BLAAUW DAVID THEODORE
分类号 G01R31/3177;G06F11/25 主分类号 G01R31/3177
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