发明名称
摘要 A gate wire is formed on a substrate. Next, after forming a gate insulating film, a semiconductor layer and an ohmic contact layer subsequently are formed thereon. Next, a data wire is formed. Next, a passivation layer and an organic insulating film are deposited, and patterned to form contact holes for exposing the drain electrode, the gate pad and the data pad, respectively. Here, the organic insulating film around the contact holes is formed thinner than that in the other portions. Next, the organic insulating film around the contact holes is removed by an ashing process to expose the borderline of the passivation layer in the contact holes, thereby removing an under-cut. Then, a pixel electrode, an assistant gate pad and an assistant data pad respectively connected to the drain electrode, the gate pad and the data pad are formed.
申请公布号 JP4544860(B2) 申请公布日期 2010.09.15
申请号 JP20030544822 申请日期 2002.10.08
申请人 发明人
分类号 G02F1/1345;H01L21/768;G02F1/1362;G02F1/1368;H01L21/28;H01L21/336;H01L21/77;H01L21/84;H01L23/532;H01L27/12;H01L29/786 主分类号 G02F1/1345
代理机构 代理人
主权项
地址
您可能感兴趣的专利