| 摘要 |
In the conventional technique disclosed in Patent Document 1, when a positional shift occurs due to poor alignment between a sintered plate and an internal conductor film, thereby causing a slight connection between the sintered plate and the internal conductor film, a defect possibly occurs in a connection to the sintered plate. A multilayer substrate 10 having a built-in chip-type electronic component of the present invention includes a ceramic laminate 11 having a plurality of ceramic layers 11A, a chip-type electronic component 13 buried in the ceramic laminate 11 and having an external terminal electrode 13A, and a via conductor 12B formed in the ceramic layers 11A,in the lamination direction. The external terminal electrode 13A of the chip-type electronic component 13 is connected to the via conductor 12B, and a connection step 12C is formed in at least one of the upper and lower end surfaces of the via conductor 12B. |
