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发明名称
PROZESSORARCHITEKTUR FÜR EXAKTE ZEIGERIDENTIFIZIERUNG
摘要
申请公布号
AT480824(T)
申请公布日期
2010.09.15
申请号
AT20040740540T
申请日期
2004.07.01
申请人
UNIVERSITAET STUTTGART
发明人
MEYER, MATTHIAS
分类号
G06F12/02;G06F9/30;G06F9/312;G06F9/35;G06F9/44
主分类号
G06F12/02
代理机构
代理人
主权项
地址
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