发明名称 Method for realising an electric linkage in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components
摘要 The present invention relates to a method for realising an electric connection in a semiconductor electronic device between a nanometric circuit architecture and standard electronic components, which comprising the steps of: a) providing a nanometric circuit architecture comprising a succession (array) (3) of conductive nanowires (2) being substantially parallel to each other and extended along a predetermined direction x; b) realising, above the succession (3) of nanowires (2), an insulating layer (6); c) opening, on the insulating layer (6), a window (7) of nanometric width b extended along a direction inclined of an angle ± with respect to the extension direction x of the nanowires (2) so as to substantially cross the whole succession (3) of nanowires (2), with exposure of a succession (11) of exposed portions (10) of the nanowires (2), one for each nanowire; d) realising, above the insulating layer (6), a plurality of conductive dies (4) extended along a direction y substantially orthogonal to the direction x and addressed towards the standard electronic components, each of such dies (4) overlapping in correspondence with said window (7) onto a respective exposed portion (10) of a nanowire (2) with obtainment of a plurality of contacts (5) realising said electric connection.
申请公布号 EP1741671(B1) 申请公布日期 2010.09.15
申请号 EP20050425488 申请日期 2005.07.08
申请人 STMICROELECTRONICS SRL 发明人 MASCOLO, DANILO;CEROFOLINI, GIANFRANCO
分类号 H01L21/768;G11C13/02 主分类号 H01L21/768
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