发明名称 Vertical SOI transistor memory cell
摘要 The present invention relates to a semiconductor device that contains at least one trench capacitor and at least one vertical transistor, and methods for forming such a semiconductor device. Specifically, the trench capacitor is located in a semiconductor substrate and comprises an outer electrode, an inner electrode, and a node dielectric layer located between the outer electrode and the inner electrode. The vertical transistor is located over the trench capacitor and comprises a source region, a drain region, a channel region, a gate dielectric, and a gate electrode. The channel region of the vertical transistor is located in a tensilely or compressively strained semiconductor layer that is oriented perpendicularly to a surface of the semiconductor substrate. Preferably, the tensilely or compressively strained semiconductor layer is embedded in an insulator structure, so that the vertical transistor has a semiconductor-on-insulator (SOI) configuration.
申请公布号 US7795661(B2) 申请公布日期 2010.09.14
申请号 US20060308105 申请日期 2006.03.07
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHENG KANGGUO;MANDELMAN JACK A.
分类号 H01L27/108;H01L29/94 主分类号 H01L27/108
代理机构 代理人
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