发明名称 Image signal processing apparatus, memory control method, and program for implementing the method
摘要 An image signal processing apparatus which is capable of preventing the “simultaneous display of an original image and the immediately preceding image” as well as dropping of frames. A signal processor subjects an image pickup signal corresponding to a subject outputted from an image pickup device to signal processing. A VRAM (Video Random Access Memory) section is composed of at least three storage areas that store image signals outputted from the signal processing circuit. A VRAM management information section stores management information indicative of storage states of the respective storage areas of the VRAM section. A compression circuit subjects an image signal read from the VRAM section to compression processing. An image display processing circuit subjects an image signal read from the VRAM section to image display processing. An image display section displays images based on the image signal outputted from the image display processing circuit. A memory controller controls read/write operations for image signals in the respective storage areas of the VRAM section based on the management information stored in the VRAM management information section.
申请公布号 US7796136(B2) 申请公布日期 2010.09.14
申请号 US20050176865 申请日期 2005.07.07
申请人 CANON KABUSHIKI KAISHA 发明人 TAKAGI SHIN;RENGAKUJI HIDEYUKI
分类号 G06F15/167;G06F12/02;G09G5/397 主分类号 G06F15/167
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