| 摘要 |
<p>PURPOSE: A nonvolatile semiconductor memory device is provided to improve yield by preventing the damage to a gate insulation layer. CONSTITUTION: A plurality of memory cell transistors respectively includes a floating gate and a control gate. A selection gate transistor includes a bottom gate electrode(32) and a top gate electrode(33). A plurality of NAND type memory cells are arranged on a cell array. A selection gate transistor is connected to the selection gate transistor on a plurality of memory cell transistors on a semiconductor substrate(30). A plurality of word lines is extended on the cell array in a row direction. A selection gate line is commonly connected to a gate electrode of a selection gate transistor. A first dummy device region(21,22) is formed on the semiconductor substrate and has a first width. A first STI region(24) is positioned on the end of a row direction of a cell array and is adjacently formed on the first dummy device region opposite to the cell array of the semiconductor substrate to be extended in a column direction. A plurality of first dummy memory cell transistors are arranged on the position in which a plurality of word lines and the first dummy device region are crossed. A first dummy selection gate transistor is arranged on the position in which the selection gate line and the first dummy device region are crossed.</p> |
