ASYMMETRIC SOURCE/DRAIN JUNCTIONS FOR LOW POWER SILICON ON INSULATOR DEVICES

摘要

PURPOSE: Asymmetric source/drain junctions for low-power silicon-on-insulator devices are provided to reduce power consumption by preventing leakages from being formed on a drain side. CONSTITUTION: A gate structure is formed on silicon-on-insulator devices(106). The gate structure includes a gate conductor(110) which is formed on a dielectric layer(112). The gate structure includes a first set of sidewall spacers(114). The first set of sidewall spacers defines the location of shallow source/drain extension regions. A second set of sidewall spacers(118) defines the deep source/drain regions of the devices.