发明名称 Delta-Sigma Modulator
摘要 The present invention provides a continuous-time delta-sigma modulator which is configured with an SC (SCR) feedback DA (103) for improving tolerance to jitter for a clock signal and operates stably by maintaining a certain feedback amount without being influenced by a change in a production process thereof or an operating temperature condition thereof. By adjusting a reference voltage Vref that determines an output voltage of the SC feedback DA (103), it is possible to feed back a certain amount of charge from the SC feedback DA (103) to a loop filter (101). Thereby, operation of the delta-sigma modulator is stabilized.
申请公布号 US2010225517(A1) 申请公布日期 2010.09.09
申请号 US20070279918 申请日期 2007.08.21
申请人 ASAHI KASEI EMD CORPORATION 发明人 AIBA YUSUKE
分类号 H03M3/00 主分类号 H03M3/00
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