| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a vector inter-instruction passing determining device and method for achieving improved efficiency of a memory network by increasing the number of times of passing between instructions while suppressing an increase in a hardware amount. Ž<P>SOLUTION: One address comparison part (2) is provided to a plurality of vector store instructions in common. The address comparison part (2) checks dependencies between addresses of the plurality of vector store instructions and subsequent vector load instructions in a time-division manner, wherein development processing in an element developing part (4) for developing from the address of a vector instruction, distance and the number of elements information to a memory access element, and address comparison processing between the plurality of vector store instructions and the subsequent vector load instructions in the address comparison part (2) can be executed in parallel. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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