发明名称 SEMICONDUCTOR DEVICE AND METHOD OF TESTING THE SAME
摘要 PROBLEM TO BE SOLVED: To detect a delay failure in a logic between a memory macro and a user logic circuit. SOLUTION: The semiconductor device includes: the memory macro; an input side test circuit selecting either one of an output from an input side user logic circuit and an output from a scan flip-flop to input it to the memory macro and taking the output from the input side user logic circuit into the scan flip-flop; and an output side test circuit selecting either one of an output from the memory macro and an output from the scan flip-flop to input it to an output side user logic circuit and taking the output from the memory macro into the scan flip-flop. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010197149(A) 申请公布日期 2010.09.09
申请号 JP20090040941 申请日期 2009.02.24
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 FUKUNAGA MASAYASU;KONISHI HIDEAKI
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
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