发明名称 INFORMATION PROCESSING APPARATUS, CIRCUIT, METHOD, AND PROGRAM FOR CONTROLLING BUS
摘要 PROBLEM TO BE SOLVED: To provide an information processing apparatus, a bus control circuit, a bus control method and a bus control program, for preventing the system operation rate of the information processing apparatus from decreasing by specifying the occurrence cause of an error. SOLUTION: The information processing apparatus is connected to a common PCI (Peripheral Component Interconnect) bus 15, and provided with a plurality of devices 1 for outputting error signals when detecting the error of the PCI bus 15. Furthermore, the information processing apparatus includes: an error signal obtaining means 10 for acquiring the error signals from the plurality of devices 1; and an error determination means 11 for determining whether or not an error has occurred in the PCI bus 15 based on the number of error signals obtained by the error signal obtaining means 10. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010198098(A) 申请公布日期 2010.09.09
申请号 JP20090039396 申请日期 2009.02.23
申请人 NEC CORP 发明人 OWADA MASAO
分类号 G06F13/00 主分类号 G06F13/00
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