| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide semiconductor memory device, semiconductor device and electronic apparatus, suppressing decrease in a power voltage. <P>SOLUTION: In a first memory macro 11, a sleep release detection circuit 18 detects a third delayed sleep signal SLPt3 that is output to the gate of a fourth transistor in a virtual power supply circuit 23. Then, when an H-level drive sleep signal SLPd is input first, followed by the input of an H-level third delayed sleep signal SLPt3, the sleep release detection circuit 18 outputs, to a memory macro of the subsequent stage, an H-level sleep signal to switch over from a sleep mode to a normal mode. <P>COPYRIGHT: (C)2010,JPO&INPIT</p> |
