| 摘要 |
A quadrature phase correction circuit includes an N-bit code counter configured to generate an N-bit code value according to a detected phase difference when a quadrature phase correction is carried out, N-bit code values are stored according to a plurality of detected phase differences. A controller shares the N-bit code counter, controls the generation of the N-bit code values according to the plurality of detected phase differences, and controls the storing of the N-bit code values in an allocated space of the storage by use of a multiplexer configured to provide the plurality of detected phase differences to the N-bit code counter, and a demultiplexer configured to store the N-bit code values in the allocated space of the storage.
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