发明名称 Partial page scheme for memory technologies
摘要 Systems and methods of managing memory provide for detecting a request to activate a memory portion that is limited in size to a partial page size, where the partial page size is less than a full page size associated with the memory. In one embodiment, detecting the request may include identifying a row address and partial page address associated with the request, where the partial page address indicates that the memory portion is to be limited to the partial page size.
申请公布号 US7793037(B2) 申请公布日期 2010.09.07
申请号 US20050140772 申请日期 2005.05.31
申请人 INTEL CORPORATION 发明人 JAIN SANDEEP;MISHRA ANIMESH;KARDACH JIM
分类号 G06F12/00 主分类号 G06F12/00
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